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The inversions on both inputs to the NAND gates bothers me. Wouldn’t inverting both inputs as well a the output turn a NAND back into an AND gate?
A NAND gate with two inverted inputs is equivalent to an OR gate. The ouput is only false when both inputs are false.
You’re right, it doesn’t seem like it should but that checks out:
11 1
01 1
01 1
00 0
It should have some kind of latch where there are two things to push and you have to do them both, or just one or the other, or whatever.
Also provides steps for getting over it.
The middle bar is a perfectly adequate step all by itself
